1. Field of the Invention
The present invention relates to a semiconductor device such as a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
2. Description of the Related Art
A power semiconductor device, typically including the power MOSFET, has a low on-resistance and a high switching speed and can efficiently control a large current of a high frequency. Accordingly, the power MOSFET has been utilized wide as a small power conversion element, for example, as a component of a power source in a personal computer.
The power MOSFET comprises a semiconductor chip with a structure that includes a plurality of cells formed in an epitaxial layer disposed on a semiconductor substrate and having gate electrodes commonly connected. This FET may include the type that has a source electrode formed on the lower surface of the semiconductor substrate and a drain electrode formed on the cell side (see, for example, JP-A 2004-158813, FIGS. 1-2).
In this type, as an interlayer insulator is sandwiched between the gate electrode and the drain electrode and these electrodes are both formed on a surface side of wafer, a parasitic capacitance (feedback capacitance Crss) which is constituted by the gate, the drain and the interlayer insulator may be caused. The feedback capacitance greatly influences on the switching speed because a large feedback capacitance lowers the switching speed.